Contributors & Integrators
Computation at the
speed of light.
Open source.
Route tensor operations through silicon photonic waveguides. Replace copper bottlenecks with Mach-Zehnder interferometer meshes that process at laser pulse speeds. Built by quantum optics researchers and ML engineers.
postdocs · infra eng · CTOs
Custom compiler pipelines, silicon co-design support, and SLA-backed inference.
Every layer of the photonic stack,
from silicon to inference.
Programmable Mach-Zehnder Meshes
Reconfigurable 2D arrays of balanced MZI splitters implement arbitrary unitary transforms. Phase shifts set via thermo-optic or electro-optic actuators in <1μs.
Optical Matrix Multiplication
O(1) depth matrix-vector products encoded in waveguide amplitude and phase. 512×512 multiplications at 200 GOPS/W.
ONNX-to-Photonic Compiler
Import any ONNX model graph. The compiler decomposes linear layers into MZI mesh configurations and emits a photonic IR for hardware or simulation.
Coherent Noise Modeling
First-principles noise model including phase error, insertion loss, and crosstalk. Calibrate against real hardware measurements or use default fab PDK parameters.
Thermal Drift Compensation
Real-time closed-loop correction for thermo-optic drift using on-chip photodetectors. Maintains phase accuracy to ±0.002 rad at 50°C ambient.
Waveguide Routing Engine
Automated placement and routing for silicon photonic dies. DRC-clean layouts from logical netlist with support for SOI, SiN, and InP platforms.
5 lines to photonic inference
Full-stack photonic compute.
Hardware to model, no gaps.
Scroll through each layer. Each one is independent and replaceable — swap your hardware target without touching the compiler.
Model Deployment
Inference runtime · REST API · batch schedulerDeploy photonic models via a unified runtime that handles device allocation, batching, and fallback to GPU simulation.
Photonic IR
Unitary decomposition · phase encoding · mesh schedulingIntermediate representation that maps linear algebra operations to physical MZI configurations with thermal and fabrication constraints.
ONNX Compiler Frontend
Graph partitioning · linear layer extraction · quantizationIngests standard ONNX graphs, identifies photonic-acceleratable subgraphs, and emits Photonic IR for downstream hardware targeting.
Simulation & Noise Engine
Coherent noise · thermal drift · fabrication variance · FDTDHigh-fidelity physical simulation with per-fab PDK parameters. Enables training noise-aware models before silicon tapeout.
Hardware Abstraction Layer
MZI driver · phase actuator · photodetector · PCIe bridgeVendor-neutral HAL exposing phase control, readback, and calibration APIs. Supports Lightmatter Envise, Lumos P1, and custom research chips.
58× faster. 875× more efficient.
Measured, not estimated.
Request Compiler Access.
Before the waitlist closes.
Enterprise support includes a dedicated compiler engineer, custom PDK integration, latency SLA for production inference, and quarterly silicon co-design reviews.